Designing innovative wireless communication devices requires close collaboration across multiple disciplines. Deploying algorithmic models to FPGA hardware enables rapid prototyping and over-the-air testing, and automatically generating HDL code directly from system-level algorithms eliminates time-consuming steps in implementation and verification.
📶 5G NR standard-compliant algorithmic modeling with MATLAB and 5G Toolbox
📶 Transitioning from a frame-based MATLAB algorithm to a streaming Simulink implementation
📶 Fixed-point implementation using Fixed-Point Designer™ and target hardware knowledge
📶 Speeding design by using proven intellectual property (IP) blocks
📶 Generating HDL and deploying on target hardware, in this case a Xilinx® Zynq® device