Hardware Design Using HDL Library on AMD Vitis Model Composer

29/08 - Thursday: Language: English (PH, MY & ID) 
05/09 - Thursday: Language: English (Translation in the Thai language is available)


Overview

Model Composer is a system-level modeling tool that facilitates FPGA hardware design. It extends Simulink® in many ways to provide a modeling environment that is well suited to hardware design. The tool provides high-level abstractions that are automatically compiled into an FPGA at the push of a button. The tool also provides access to underlying FPGA resources through low-level abstractions, allowing the construction of highly efficient FPGA designs.


In this workshop, you will learn about the Model-Based Design workflow using Model Composer, how to setup the Simulink model using blocks from HDL library and do automatic code generation, how to import a Model Composer HDL design into a bigger system.

 


 

Seats are limited,  Register now!

Trainer Profile

 

Thang Ngo

Mr.Thang Ngo

Application Engineer  

Thang is a seasoned FPGA and embedded software engineer with a degree in Control Engineering and Automation from HUST. He specialized in the field of Model-based design with expertise in MATLAB/Simulink and various areas, especially in the Signal Processing industry, e.g., DSP, FPGA and Embedded Systems, and Control Systems. Before joining Ascendas Systems, he was a Signal Processing Software Engineer at Viettel Aerospace Institute.

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