[Free Training ] Hardware Design Using HDL Library on Vitis Model Composer (1 Day)

30 March 2023 | 10:00 - 16:00 (GMT+8) | Via Zoom

Overview

Model Composer is a system-level modeling tool that facilitates FPGA hardware design. It extends Simulink® in many ways to provide a modeling environment that is well-suited to hardware design. The tool provides high-level abstractions that are automatically compiled into an FPGA at the push of a button. The tool also provides access to underlying FPGA resources through low-level abstractions, allowing the construction of highly efficient FPGA designs.

In this workshop, you will learn about the Model-Based Design workflow using Model Composer, how to set up the Simulink model using blocks from HDL library and do automatic code generation, and how to import a Model Composer HDL design into a bigger system.

Highlights 

  • Design Flows using Model Composer 
  • System-Level Modeling in Vitis Model Composer 
  • Automatic Code Generation
  • Compiling MATLAB into and FPGA 
  • Importing a Model Composer HDL Design into a Bigger System

 

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