Vitis™ Model Composer provides the HLS block set in the Xilinx toolbox. This enables you to transform your algorithmic specifications to production-quality IP implementations using automatic optimizations and leveraging the high-level synthesis technology of Vitis HLS. Using the IP integrator in Vivado, you can then integrate the IP into a platform that, for example, may include a Zynq® device, DDR3 DRAM, and a software stack running on an Arm® processor.
The HLS library in the Xilinx Toolbox provides optimized blocks for use within the Simulink environment. These include basic functional blocks for expressing algorithms like Math, Linear Algebra, Logic, and Bit-wise operations and others.
In this workshop, you will learn about the Model-Based Design workflow using HLS blockset of Model Composer, how to setup the Simulink model using blocks from HLS library and do automatic code generation
Trainer and Senior Training Consultant
Dr Marta Tjoa is Trainer and Senior Training Consultant at TechSource Systems Pte Ltd. She has more than 25 years of experience in using MATLAB and Simulink and she has conducted numerous basic and advanced courses in MATLAB and Simulink to the industries in ASEAN countries. She has helped engineers, data scientists, and financial professionals, with little or no programming background to jumpstart MATLAB and Simulink in the shortest time. She helped them in doing some of their tasks on data modeling, data science analysis, system dynamic modeling, optimization and machine learning and deep learning for image processing application. She delivered courses to implement Digital Signal Processing and Image Processing applications on AMD FPGAs and SoCs using Simulink.