This training introduces the heterogeneous AMD Versal platform and how different engines can be targeted for specific acceleration tasks. Vitis Unified Development Environment is introduced with a focus on System linking. Network on Chip (NoC) is a critical part of Versal systems to achieve high-performance data flows with QoS. NoC features and Designing with NoC are introduced.  

Highlights 

• Versal Architecture Overview  
• Versal Platform and dataflows for Systems  
• Versal Design Flows
• NoC Introduction  
• NoC IP configuration - Memory mapped AXI and AXI Stream flows
• NoC Integrated DDR Memory Controller 
• NoC Performance Specification and Assessment
• Example Design demonstration