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Overview

Designing deep learning, computer vision, and signal processing applications and deploying them to FPGAs, GPUs, and CPU platforms like Xilinx Zynq™ or NVIDIA® Jetson or ARM® processors is challenging because of resource constraints inherent in embedded devices. This talk walks you through a MATLAB® based deployment workflow that generates C/C++ or CUDA® or VHDL code.

 

Key Highlights

  • For system designers looking to integrate deep learning into their FPGA-based applications, the talk helps teach the challenges and considerations for deploying to FPGA hardware.
  • We will briefly show how to explore and prototype trained networks on FPGAs using prebuilt bistreams from MATLAB.
  • You can further customize your network to meet your performance requirements and hardware resource usage, generate HDL, and integrate it into an FPGA-based edge inference system.
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Date: 19 Feb 2021

Time: 15:00 PM (GMT+8)

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Speaker

Dr. Rishu Gupta

Rishu Gupta is a senior application engineer at MathWorks India. He primarily focuses on image processing, computer vision, and deep learning applications. Rishu has over nine years of experience working on applications related to visual contents. He previously worked as a scientist at LG Soft India in the Research and Development unit.

He has published and reviewed papers in multiple peer-reviewed conferences and journals. Rishu holds a bachelor’s degree in electronics and communication engineering from BIET Jhansi, a master’s in visual contents from Dongseo University, South Korea, working on the application of computer vision, and a Ph.D. in electrical engineering from University Technology Petronas, Malaysia with a focus on biomedical image processing for ultrasound images.

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