Migrating from UltraScale+ Device to Versal

 4 March 2025 (Tuesday)  | 10:30 - 16:00 (GMT+8) | Via Zoom

Overview

  • The Versal architecture integrates different compute domains, including the processing system (such as the Arm® Cortex®-A72 and Cortex-R5F processors), AI Engines for advanced signal processing, and programmable logic (combining CLBs and memory). This combination, along with a robust network on chip (NoC), enables efficient memory-mapped access across the device.
    Meanwhile,  Ultrascale+ has also provide different compute domains, including the processing system (such as the Arm® Cortex®-A53 and Cortex-R5F processors), and programmable logic (combining CLBs and memory).


  • In this workshop, you will learn the key difference between both architectures to help user to migrate their design from Ultrascale+ to Versal.

 

Highlights 

  • Migrate Programmable Logic from Ultrascale+ to Versal with Example.
  • Migrate Processing System from Ultrascale+ to Versal with Example.

 

 

Seats are limited,  Register now!

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