Overview

The emergence of a new generation of Adaptive Compute Acceleration Platforms opens up new possibilities for both software and hardware developers.

These platforms integrate a heterogeneous compute architecture with CPUs, GPUs and FPGAs, enabling the development of scalar, adaptable and intelligent engines, tightly coupled with custom memory hierarchies and a Network-on-Chip.

Be at the forefront of FPGA technologies and learn how to use Xilinx next generation FPGA platform - Versal® ACAP!  This 1-day workshop will equip you with the basic knowledge to kickstart Versal ACAP for your projects.  

In this training, you will learn about Versal™️ ACAP architecture and design methodology.  The emphasis of this course is on:

• Versal Architecture Overview
• AIE Engine Introduction
• NoC and System Simulation
• Vitis Design Flow for Versal
• Vitis AI Tutorial
• Xilinx Add-on for MATLAB and Simulink tool for AI Engine kernel development
• Q & A

Certificates-of-Attendance will be provided to attendees after the training.

Who To Attend

• For software and hardware developers, system architects, and anyone wanting to learn about building the adaptable, intelligent world
  

* Seats are limited.  Registration is based on a first-come-first-served basis

* Payment in Advance is required to confirm your slot